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» Interconnect design methods for memory design
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WSC
1997
13 years 9 months ago
Design and Implementation of HLA Time Management in the RTI Version F.0
The DoD High Level architecture (HLA) has recently become the required method for the interconnection of all DoD computer simulations. The HLA addresses the rules by which simulat...
Christopher D. Carothers, Richard Fujimoto, Richar...
ISPD
1998
ACM
91views Hardware» more  ISPD 1998»
13 years 11 months ago
Estimation of maximum current envelope for power bus analysis and design
In this paper we present an input pattern independent method to compute the maximum current envelope, which is an upper bound over all possible current waveforms drawn by a circui...
Sudhakar Bobba, Ibrahim N. Hajj
SPDP
1993
IEEE
13 years 11 months ago
The Meerkat Multicomputer
Meerkat is a distributed memory multicomputer architecture that scales to hundreds of processors. Meerkat uses a two dimensional passive backplane to connect nodes composed of pro...
Robert C. Bedichek, Curtis Brown
GLVLSI
2005
IEEE
132views VLSI» more  GLVLSI 2005»
14 years 1 months ago
Interconnect capacitance extraction for system LCD circuits
This paper discusses interconnect capacitance extraction for system LCD circuits, where coupling capacitance is much significant since a ground plane locates far away unlike LSI ...
Yoshihiro Uchida, Sadahiro Tani, Masanori Hashimot...
IPPS
2006
IEEE
14 years 1 months ago
A study of the on-chip interconnection network for the IBM Cyclops64 multi-core architecture
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
Yingping Zhang, Taikyeong Jeong, Fei Chen, Haiping...