816 search results - page 31 / 164 » Interconnect design methods for memory design |
ICPP
2003
IEEE
14 years 27 days ago
2003
IEEE
A hardware-assisted design, dubbed cache-oriented multistage structure (COMS), is proposed for fast packet forwarding. COMS incorporates small on-chip cache memory in its constitu...
AAAI
1990
13 years 8 months ago
1990
Knowledge processing is very demanding on computer architectures. Knowledge processing generates subcomputation paths at an exponential rate. It is memory intensive and has high c...
FPL
2000
Springer
13 years 11 months ago
2000
Springer
Abstract. This paper presents an innovative architecture for a reconfigurable device that allows single cycle context switching and single cycle random access to the unified on-chi...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
Pattern matching relies on deterministic finite automata (DFA) to search for predefined patterns. While a bit-DFA method is recently proposed to exploit the parallelism in pattern...
WMPI
2004
ACM
14 years 1 months ago
2004
ACM
Abstract. The large and growing impact of memory hierarchies on overall system performance compels designers to investigate innovative techniques to improve memory-system efficienc...