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» Interconnect design methods for memory design
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DATE
2003
IEEE
69views Hardware» more  DATE 2003»
14 years 2 months ago
Performance-Directed Retiming for FPGAs Using Post-Placement Delay Information
In today’s deep-submicron designs, the interconnect delays contribute an increasing part to the overall performance of an implementation. Particularly when targeting field prog...
Ulrich Seidl, Klaus Eckl, Frank M. Johannes
IISWC
2008
IEEE
14 years 3 months ago
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
Clay Hughes, Tao Li
SENSYS
2004
ACM
14 years 2 months ago
Hardware design experiences in ZebraNet
The enormous potential for wireless sensor networks to make a positive impact on our society has spawned a great deal of research on the topic, and this research is now producing ...
Pei Zhang, Christopher M. Sadler, Stephen A. Lyon,...
TACAS
1998
Springer
81views Algorithms» more  TACAS 1998»
14 years 1 months ago
Formal Design and Analysis of a Gear Controller
In this paper, we report on an application of the validation and veri cation tool kit Uppaal in the design and analysis of a prototype gear controller, carried out in a joint proje...
Magnus Lindahl, Paul Pettersson, Wang Yi
NETWORKING
2008
13 years 10 months ago
The CPBT: A Method for Searching the Prefixes Using Coded Prefixes in B-Tree
Due to the increasing size of IP routing table and the growing rate of their lookups, many algorithms are introduced to achieve the required speed in table search and update or opt...
Mohammad Behdadfar, Hossein Saidi