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» Interconnect design methods for memory design
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ASPDAC
2006
ACM
127views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Memory size computation for multimedia processing applications
– In real-time multimedia processing systems a very large part of the power consumption is due to the data storage and data transfer. Moreover, the area cost is often largely dom...
Hongwei Zhu, Ilie I. Luican, Florin Balasa
ISORC
2006
IEEE
14 years 2 months ago
Automatic Memory Management in Utility Accrual Scheduling Environments
Convenience, reliability, and effectiveness of automatic memory management have long been established in modern systems and programming languages such as Java. The timeliness req...
Shahrooz Feizabadi, Godmar Back
CORR
2006
Springer
116views Education» more  CORR 2006»
13 years 9 months ago
Memory Aware High-Level Synthesis for Embedded Systems
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...
Gwenolé Corre, Eric Senn, Nathalie Julien, ...
ISPD
2006
ACM
108views Hardware» more  ISPD 2006»
14 years 2 months ago
Statistical clock tree routing for robustness to process variations
Advances in VLSI technology make clock skew more susceptible to process variations. Notwithstanding efficient zero skew routing algorithms, clock skew still limits post-manufactu...
Uday Padmanabhan, Janet Meiling Wang, Jiang Hu
DDECS
2007
IEEE
201views Hardware» more  DDECS 2007»
14 years 3 months ago
Built in Defect Prognosis for Embedded Memories
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskaran...