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» Interconnect design methods for memory design
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ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
14 years 5 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
ASPDAC
2008
ACM
102views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Duo-binary circular turbo decoder based on border metric encoding for WiMAX
- This paper presents a duo-binary circular turbo decoder based on border metric encoding. With the proposed method, the memory size for branch memory is reduced by half and the du...
Ji-Hoon Kim, In-Cheol Park
IISWC
2009
IEEE
14 years 3 months ago
On the (dis)similarity of transactional memory workloads
— Programming to exploit the resources in a multicore system remains a major obstacle for both computer and software engineers. Transactional memory offers an attractive alternat...
Clay Hughes, James Poe, Amer Qouneh, Tao Li
ISCA
1997
IEEE
108views Hardware» more  ISCA 1997»
14 years 1 months ago
The SGI Origin: A ccNUMA Highly Scalable Server
The SGI Origin 2000 is a cache-coherent non-uniform memory access (ccNUMA) multiprocessor designed and manufactured by Silicon Graphics, Inc. The Origin system was designed from t...
James Laudon, Daniel Lenoski
TVLSI
2002
98views more  TVLSI 2002»
13 years 8 months ago
Minimizing memory access energy in embedded systems by selective instruction compression
We propose a technique for reducing the energy spent in the memory-processor interface of an embedded system during the execution of firmware code. The method is based on the idea ...
Luca Benini, Alberto Macii, Enrico Macii, Massimo ...