816 search results - page 71 / 164 » Interconnect design methods for memory design |
CODES
2007
IEEE
14 years 3 months ago
2007
IEEE
Early embedded SW development with transaction-level models has been broadly promoted to improve SoC design productivity. But the proposed APIs only provide low-level read/write o...
ISNN
2004
Springer
14 years 2 months ago
2004
Springer
Abstract. In this paper, some sufficient conditions are obtained to guarantee that discrete time cellular neural networks (DTCNNs) can have some stable memory patterns. These condi...
ICASSP
2011
IEEE
13 years 20 days ago
2011
IEEE
Context based entropy coding has the potential to provide higher gain over memoryless entropy coding. However serious difficulties arise regarding the practical implementation in...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
—Packet-switched interconnect fabric is a promising on-chip communication solution for many-core architectures. It offers high throughput and excellent scalability for on-chip da...
TCAD
2008
13 years 8 months ago
2008
Abstract--Advances in very large-scale integration technology make clock skew more susceptible to process variations. Notwithstanding efficient exact zero-skew algorithms, clock sk...