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» Interconnect design methods for memory design
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PFE
2001
Springer
14 years 4 days ago
Introducing Product Lines in Small Embedded Systems
: How do you introduce product lines into a hardware dominated organization that has increasing software architecture awareness and products with extremely limited memory resources...
Christoph Stoermer, Markus Roeddiger
VLSID
2002
IEEE
136views VLSI» more  VLSID 2002»
14 years 8 months ago
Buffered Routing Tree Construction under Buffer Placement Blockages
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...
Wei Chen, Massoud Pedram, Premal Buch
GECCO
2010
Springer
233views Optimization» more  GECCO 2010»
14 years 16 days ago
Evolutionary-based conflict-free scheduling of collective communications on spidergon NoCs
The Spidergon interconnection network has become popular recently in multiprocessor systems on chips. To the best of our knowledge, algorithms for collective communications (CC) h...
Jirí Jaros, Vaclav Dvorak
CIKM
2009
Springer
13 years 11 months ago
Suffix trees for very large genomic sequences
A suffix tree is a fundamental data structure for string searching algorithms. Unfortunately, when it comes to the use of suffix trees in real-life applications, the current metho...
Marina Barsky, Ulrike Stege, Alex Thomo, Chris Upt...
DSD
2008
IEEE
95views Hardware» more  DSD 2008»
14 years 2 months ago
Programmable Numerical Function Generators for Two-Variable Functions
This paper proposes a design method and programmable architectures for numerical function generators (NFGs) of two-variable functions. To realize a two-variable function in hardwa...
Shinobu Nagayama, Jon T. Butler, Tsutomu Sasao