731 search results - page 36 / 147 » Interconnect modeling for improved system-level design optim... |
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
IPPS
2008
IEEE
14 years 2 months ago
2008
IEEE
In this paper, we present the design and implementation of a distributed sensor network application for embedded, isolated-word, real-time speech recognition. In our system design...
ASPDAC
2004
ACM
13 years 11 months ago
2004
ACM
- In this paper, a novel strategy for designing the heterogeneous-tree multiplexer is proposed. We build the multiplexer delay model by curve fitting and then formulate the heterog...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
This study examined the interplay among processor speed, cluster interconnect and file I/O, using parallel applications to quantify interactions. We focused on a common case wher...
EMSOFT
2007
Springer
14 years 1 months ago
2007
Springer
Most recent embedded systems use caches to improve their average performance. Current timing analyses are able to compute safe timing guarantees for these systems, if tasks are ru...