731 search results - page 37 / 147 » Interconnect modeling for improved system-level design optim... |
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
Abstract— We present in this paper a new interconnect-driven multilevel floorplanning, called IMF, to handle large-scale building-module designs. Unlike the traditional multilev...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
CDC
2009
IEEE
13 years 11 months ago
2009
IEEE
Abstract-- Dataflow representations of Digital Signal Processing (DSP) software have been developing since the 1980's. They have proven to be useful in identifying bottlenecks...
ISPD
2005
ACM
14 years 1 months ago
2005
ACM
Research in floorplanning and block-packing has generated a variety of data structures to represent spatial configurations of circuit modules. Much of this work focuses on the g...
ICCAD
2007
IEEE
14 years 4 months ago
2007
IEEE
— Clock meshes posses inherent low clock skews and excellent immunity to PVT variations, and have increasingly found their way to high-performance IC designs. However, analysis o...