731 search results - page 60 / 147 » Interconnect modeling for improved system-level design optim... |
IPPS
2009
IEEE
14 years 2 months ago
2009
IEEE
Experimental validation and testing of solutions designed for heterogeneous environment is a challenging issue. Wrekavoc is a tool for performing such validation. It runs unmodiï¬...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—We present an optimal methodology for dynamic voltage scheduling problem in the presence of realistic assumption such as leakage-power and intra-task overheads. Our contribution...
ISQED
2003
IEEE
14 years 29 days ago
2003
IEEE
— The design of an efficient monolithic buck converter is presented in this paper. A low swing MOSFET gate drive technique is proposed that improves the efficiency characteristic...
ET
2002
13 years 7 months ago
2002
Test access mechanisms (TAMs) and test wrappers are integral parts of a system-on-chip (SOC) test architecture. Prior research has concentrated on only one aspect of the TAM/wrappe...
IDEAS
2003
IEEE
14 years 29 days ago
2003
IEEE
We propose a new storage model called MBSM (Multiresolution Block Storage Model) for laying out tables on disks. MBSM is intended to speed up operations such as scans that are typ...