Sciweavers

13 search results - page 3 / 3
» Interconnect parasitic extraction in the digital IC design m...
Sort
View
CHES
2005
Springer
109views Cryptology» more  CHES 2005»
14 years 3 months ago
Security Evaluation Against Electromagnetic Analysis at Design Time
Electromagnetic analysis (EMA) can be used to compromise secret information by analysing the electric and/or magnetic fields emanating from a device. It follows differential power...
Huiyun Li, A. Theodore Markettos, Simon W. Moore
VLSID
2000
IEEE
90views VLSI» more  VLSID 2000»
14 years 2 months ago
Performance Analysis of Systems with Multi-Channel Communication Architectures
This paper presents a novel system performance analysis technique to support the design of custom communication architectures for System-on-Chip ICs. Our technique fills a gap in...
Kanishka Lahiri, Sujit Dey, Anand Raghunathan
ICCAD
2001
IEEE
84views Hardware» more  ICCAD 2001»
14 years 6 months ago
Minimum-Buffered Routing of Non-Critical Nets for Slew Rate and Reliability Control
In high-speed digital VLSI design, bounding the load capacitance at gate outputs is a well-known methodology to improve coupling noise immunity, reduce degradation of signal trans...
Charles J. Alpert, Andrew B. Kahng, Bao Liu, Ion I...