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Publication
248views
13 years 6 months ago
Equalizer: A Scalable Parallel Rendering Framework
Continuing improvements in CPU and GPU performances as well as increasing multi-core processor and cluster-based parallelism demand for flexible and scalable parallel rendering sol...
Stefan Eilemann, Maxim Makhinya, Renato Pajarola
VLSID
2002
IEEE
189views VLSI» more  VLSID 2002»
14 years 9 months ago
Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language
Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...
Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, ...
DL
1997
Springer
206views Digital Library» more  DL 1997»
14 years 1 months ago
The Digital Library Integrated Task Environment (DLITE)
We describe a case study in the design of a user interface to a digital library. Our design stems from a vision of a library as a channel to the vast array of digital information ...
Steve B. Cousins, Andreas Paepcke, Terry Winograd,...
CODES
1999
IEEE
14 years 1 months ago
Software controlled power management
Reducing power consumption is critical in many system designs. Dynamic power management is an effective approach to decrease power without significantly degrading performance. Pow...
Yung-Hsiang Lu, Tajana Simunic, Giovanni De Michel...
CODES
2003
IEEE
14 years 2 months ago
Design space exploration of a hardware-software co-designed GF(2m) galois field processor for forward error correction and crypt
This paper describes a hardware-software co-design approach for flexible programmable Galois Field Processing for applications which require operations over GF(2m ), such as RS an...
Wei Ming Lim, Mohammed Benaissa