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GLOBECOM
2006
IEEE
14 years 1 months ago
Investigation of Error Floors of Structured Low-Density Parity-Check Codes by Hardware Emulation
Abstract−Several high performance LDPC codes have paritycheck matrices composed of permutation submatrices. We design a parallel-serial architecture to map the decoder of any str...
Zhengya Zhang, Lara Dolecek, Borivoje Nikolic, Ven...
ICC
2007
IEEE
124views Communications» more  ICC 2007»
14 years 1 months ago
Quantization Effects in Low-Density Parity-Check Decoders
−A class of combinatorial structures, called absorbing sets, strongly influences the performance of low-density paritycheck (LDPC) decoders. In particular, the quantization schem...
Zhengya Zhang, Lara Dolecek, Martin J. Wainwright,...
ICC
2007
IEEE
113views Communications» more  ICC 2007»
14 years 1 months ago
Analysis of Absorbing Sets for Array-Based LDPC Codes
— Low density parity check codes (LDPC) are known to perform very well under iterative decoding. However, these codes also exhibit a change in the slope of the bit error rate (BE...
Lara Dolecek, Zhengya Zhang, Venkat Anantharam, Ma...
VLSID
2006
IEEE
158views VLSI» more  VLSID 2006»
14 years 1 months ago
Programmable LDPC Decoder Based on the Bubble-Sort Algorithm
Low density parity check (LDPC) codes are one of the most powerful error correcting codes known. Recent research have pointed out their potential for a low cost, low latency hardw...
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
DFT
2007
IEEE
135views VLSI» more  DFT 2007»
14 years 1 months ago
Fault Secure Encoder and Decoder for Memory Applications
We introduce a reliable memory system that can tolerate multiple transient errors in the memory words as well as transient errors in the encoder and decoder (corrector) circuitry....
Helia Naeimi, André DeHon