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MICRO
1991
IEEE
85views Hardware» more  MICRO 1991»
13 years 12 months ago
Comparing Static and Dynamic Code Scheduling for Multiple-Instruction-Issue Processors
This paper examines two alternative approaches to supporting code scheduling for multiple-instruction-issue processors. One is to provide a set of non-trapping instructions so tha...
Pohua P. Chang, William Y. Chen, Scott A. Mahlke, ...
RTAS
2008
IEEE
14 years 2 months ago
WCET Analysis for Multi-Core Processors with Shared L2 Instruction Caches
Multi-core chips have been increasingly adopted by microprocessor industry. For real-time systems to safely harness the potential of multi-core computing, designers must be able t...
Jun Yan, Wei Zhang
WWW
2003
ACM
14 years 9 months ago
SweetDeal: representing agent contracts with exceptions using XML rules, ontologies, and process descriptions
SweetDeal is a rule-based approach to representation of business contracts that enables software agents to create, evaluate, negotiate, and execute contracts with substantial auto...
Benjamin N. Grosof, Terrence C. Poon
ECOOP
2004
Springer
14 years 1 months ago
Finding and Removing Performance Bottlenecks in Large Systems
Abstract. Software systems obey the 80/20 rule: aggressively optimizing a vital few execution paths yields large speedups. However, finding the vital few paths can be difficult, e...
Glenn Ammons, Jong-Deok Choi, Manish Gupta, Nikhil...
CGO
2004
IEEE
14 years 6 days ago
VHC: Quickly Building an Optimizer for Complex Embedded Architectures
To meet the high demand for powerful embedded processors, VLIW architectures are increasingly complex (e.g., multiple clusters), and moreover, they now run increasingly sophistica...
Michael Dupré, Nathalie Drach, Olivier Tema...