11 search results - page 2 / 3 » JHDL - An HDL for Reconfigurable Systems |
SBCCI
2006
ACM
14 years 2 months ago
2006
ACM
The growing complexity and production cost of processor-based systems have imposed big constraints in SoC design of new systems. GPPs and ASICs are unable to fit the tight perform...
VLSISP
2008
13 years 8 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
SC
2009
ACM
14 years 1 months ago
2009
ACM
Reconfigurable computing (RC) is rapidly becoming a vital technology for many applications, from high-performance computing to embedded systems. The inherent advantages of custom-...
DATE
2010
IEEE
14 years 1 months ago
2010
IEEE
—Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. One bit transform (1BT) based ME algorithms have low comput...
TACO
2008
13 years 8 months ago
2008
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...