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ASPDAC
2006
ACM
89views Hardware» more  ASPDAC 2006»
14 years 1 months ago
CGTA: current gain-based timing analysis for logic cells
This paper introduces a new current-based cell timing analyzer, called CGTA, which has a higher performance than existing logic cell timing analysis tools. CGTA relies on a compac...
Shahin Nazarian, Massoud Pedram, Tao Lin, Emre Tun...
ISCC
2009
IEEE
163views Communications» more  ISCC 2009»
14 years 2 months ago
Distributed parallel scheduling algorithms for high-speed virtual output queuing switches
Abstract—This paper presents a novel scalable switching architecture for input queued switches with its proper arbitration algorithms. In contrast to traditional switching archit...
Lotfi Mhamdi, Mounir Hamdi
INFOCOM
2007
IEEE
14 years 2 months ago
Feedforward SDL Constructions of Output-Buffered Multiplexers and Switches with Variable Length Bursts
Abstract— In this paper, we study the problem of exact emulation of two types of optical queues: (i) N-to-1 output-buffered multiplexers with variable length bursts, and (ii) N Ã...
Yi-Ting Chen, Cheng-Shang Chang, Jay Cheng, Duan-S...
DATE
2008
IEEE
125views Hardware» more  DATE 2008»
14 years 2 months ago
Current source based standard cell model for accurate signal integrity and timing analysis
— The inductance and coupling effects in interconnects and non-linear receiver loads has resulted in complex input signals and output loads for gates in the modern deep submicron...
Amit Goel, Sarma B. K. Vrudhula
ICDAR
2003
IEEE
14 years 1 months ago
A New Classifier Simulator for Evaluating Parallel Combination Methods
The use of artificial outputs generated by a classifier simulator has recently emerged as a new trend to provide an underlying evaluation of classifier combination methods. In thi...
Héla Zouari, Laurent Heutte, Yves Lecourtie...