48 search results - page 1 / 10 » Kestrel: Design of an 8-bit SIMD Parallel Processor |
ARVLSI
1997
IEEE
13 years 11 months ago
1997
IEEE
ASAP
1996
IEEE
13 years 11 months ago
1996
IEEE
Kestrel is a programmable linear array processor designed for sequence analysis. Among other features, Kestrel includes an 8-bit word, a single-cycle add-and-minimize instruction, ...
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
—This paper describes a low cost, low power, versatile computation module that can be used as a coarse-grain building block in multimedia processors. The module, which has a data...
CASES
2010
ACM
13 years 5 months ago
2010
ACM
In modern wireless devices, two broad classes of compute-intensive applications are common: those with high amounts of data-level parallelism, such as signal processing used in wi...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
— Increasing demands for robust image recognition systems require vision processors not only with enormous computational capacities but also with sufficient flexibility to hand...