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VLDB
2004
ACM
92views Database» more  VLDB 2004»
14 years 3 months ago
Write-Optimized B-Trees
Large writes are beneficial both on individual disks and on disk arrays, e.g., RAID-5. The presented design enables large writes of internal B-tree nodes and leaves. It supports b...
Goetz Graefe
FCCM
2003
IEEE
135views VLSI» more  FCCM 2003»
14 years 3 months ago
Efficient Application Representation for HASTE: Hybrid Architectures with a Single, Transformable Executable
Hybrid architectures, which are composed of a conventional processor closely coupled with reconfigurable logic, seem to combine the advantages of both types of hardware. They pres...
Benjamin A. Levine, Herman Schmit
IPPS
2003
IEEE
14 years 3 months ago
Constrained Component Deployment in Wide-Area Networks Using AI Planning Techniques
Component-based models represent a dominant trend in the construction of wide-area network applications, making possible the integration of diverse functionality contained in modu...
Tatiana Kichkaylo, Anca-Andreea Ivan, Vijay Karamc...
ISPD
2003
ACM
110views Hardware» more  ISPD 2003»
14 years 3 months ago
Explicit gate delay model for timing evaluation
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxi...
MOBICOM
2003
ACM
14 years 3 months ago
Towards realistic mobility models for mobile ad hoc networks
One of the most important methods for evaluating the characteristics of ad hoc networking protocols is through the use of simulation. Simulation provides researchers with a number...
Amit P. Jardosh, Elizabeth M. Belding-Royer, Kevin...