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MFCS
1994
Springer
14 years 3 months ago
A Proof System for Asynchronously Communicating Deterministic Processes
We introduce in this paper new communication and synchronization constructs which allow deterministic processes, communicating asynchronously via unbounded FIFO bu ers, to cope wi...
Frank S. de Boer, M. van Hulst
ICCAD
1995
IEEE
114views Hardware» more  ICCAD 1995»
14 years 2 months ago
Sequential synthesis using S1S
Abstract—We propose the use of the logic S1S as a mathematical framework for studying the synthesis of sequential designs. We will show that this leads to simple and mathematical...
Adnan Aziz, Felice Balarin, Robert K. Brayton, Alb...
ASPDAC
2005
ACM
79views Hardware» more  ASPDAC 2005»
14 years 29 days ago
Simulation acceleration of transaction-level models for SoC with RTL sub-blocks
Abstract— This paper presents an optimized channel usage between simulator and accelerator when the simulator models transaction-level SoC while accelerator models RTL sub-blocks...
Jae-Gon Lee, Woo-Seung Yang, Young-Su Kwon, Young-...
CONCUR
2005
Springer
14 years 29 days ago
The Coarsest Congruence for Timed Automata with Deadlines Contained in Bisimulation
Abstract. Delaying the synchronization of actions may reveal some hidden behavior that would not happen if the synchronization met the specified deadlines. This precise phenomenon...
Pedro R. D'Argenio, Biniam Gebremichael
FORMATS
2008
Springer
14 years 16 days ago
Formal Modeling and Scheduling of Datapaths of Digital Document Printers
Abstract. We apply three different modeling frameworks -- timed automata (Uppaal), colored Petri nets and synchronous data flow -- to model a challenging industrial case study that...
Georgeta Igna, Venkatesh Kannan, Yang Yang, Twan B...