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MICRO
2008
IEEE
109views Hardware» more  MICRO 2008»
14 years 2 months ago
Dependence-aware transactional memory for increased concurrency
—Transactional memory (TM) is a promising paradigm for helping programmers take advantage of emerging multicore platforms. Though they perform well under low contention, hardware...
Hany E. Ramadan, Christopher J. Rossbach, Emmett W...
SECON
2008
IEEE
14 years 2 months ago
Content Distribution in VANETs Using Network Coding: The Effect of Disk I/O and Processing O/H
Abstract—Besides safe navigation (e.g., warning of approaching vehicles), car to car communications will enable a host of new applications, ranging from office-on-the-wheel supp...
Seung-Hoon Lee, Uichin Lee, Kang-Won Lee, Mario Ge...
SECURWARE
2008
IEEE
14 years 2 months ago
A Dependability Case Approach to the Assessment of IP Networks
—IP networks, composing the Internet, form a central part of the information infrastructure of the modern society. Integrated approaches to the assessment of their dependability ...
Ilkka Norros, Pirkko Kuusela, Pekka Savola
CCGRID
2007
IEEE
14 years 2 months ago
Build-and-Test Workloads for Grid Middleware: Problem, Analysis, and Applications
The Grid promise is starting to materialize today: largescale multi-site infrastructures have grown to assist the work of scientists from all around the world. This tremendous gro...
Alexandru Iosup, Dick H. J. Epema
DATE
2007
IEEE
174views Hardware» more  DATE 2007»
14 years 2 months ago
ATLAS: a chip-multiprocessor with transactional memory support
Chip-multiprocessors are quickly becoming popular in embedded systems. However, the practical success of CMPs strongly depends on addressing the difficulty of multithreaded appli...
Njuguna Njoroge, Jared Casper, Sewook Wee, Yuriy T...