24 search results - page 1 / 5 » Latency-Aware Bus Arbitration for Real-Time Embedded Systems |
IEICET
2007
13 years 7 months ago
2007
DAC
2006
ACM
14 years 8 months ago
2006
ACM
In designing bus based systems with parallel and pipelined architecture, it is important to derive a real time budget (a specified execution time limit) for each task of a bus bas...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
On an SoC bus, contentions occur while different IP cores request the bus access at the same time. Hence an arbiter is mandatory to deal with the contention issue on a shared bus s...
HIPEAC
2005
Springer
14 years 26 days ago
2005
Springer
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
ECRTS
2003
IEEE
14 years 19 days ago
2003
IEEE
This paper deals with specific issues related to the design of distributed embedded systems implemented with mixed, event-triggered and time-triggered task sets, which communicate...