2145 search results - page 289 / 429 » Lax Logical Relations |
129
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ASPDAC
2000
ACM
15 years 8 months ago
2000
ACM
Abstract— Clock-gating techniques are very effective in the reduction of the switching activity in sequential logic circuits. In particular, recent work has shown that significa...
126
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FCCM
1999
IEEE
15 years 8 months ago
1999
IEEE
We have implemented an image combining architecture that allows distributed rendering of a partitioned data set at interactive rates. The architecture achieves real-time frame rat...
121
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ICCAD
1997
IEEE
15 years 8 months ago
1997
IEEE
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...
152
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LPNMR
1993
Springer
15 years 8 months ago
1993
Springer
We present a logic programming language which uses a four-valued bilattice as the underlying framework for semantics of programs. The two orderings of the bilattice reflect the c...
168
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POPL
1993
ACM
15 years 8 months ago
1993
ACM
e data structures are abstractions of simple records and pointers. They impose a shape invariant, which is verified at compiletime and exploited to automatically generate code fo...