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» Lazy Error Detection for Microprocessor Functional Units
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APCSAC
2005
IEEE
14 years 1 months ago
Resource-Driven Optimizations for Transient-Fault Detecting SuperScalar Microarchitectures
Increasing microprocessor vulnerability to soft errors induced by neutron and alpha particle strikes prevents aggressive scaling and integration of transistors in future technologi...
Jie Hu, Greg M. Link, Johnsy K. John, Shuai Wang, ...
EDCC
1999
Springer
13 years 11 months ago
Considering Workload Input Variations in Error Coverage Estimation
The effects of variations in the workload input when estimating error detection coverage using fault injection are investigated. Results from scanchain implemented fault injection ...
Peter Folkesson, Johan Karlsson
EMSOFT
2005
Springer
14 years 29 days ago
Compiler-guided register reliability improvement against soft errors
With the scaling of technology, transient errors caused by external particle strikes have become a critical challenge for microprocessor design. As embedded processors are widely ...
Jun Yan, Wei Zhang
APCSAC
2004
IEEE
13 years 11 months ago
A Compiler-Assisted On-Chip Assigned-Signature Control Flow Checking
As device sizes continue shrinking, lower charges are needed to activate gates, and consequently ever smaller external events (such as single ionizing particles of naturally occurr...
Xiaobin Li, Jean-Luc Gaudiot
ISCA
2012
IEEE
224views Hardware» more  ISCA 2012»
11 years 10 months ago
A first-order mechanistic model for architectural vulnerability factor
Soft error reliability has become a first-order design criterion for modern microprocessors. Architectural Vulnerability Factor (AVF) modeling is often used to capture the probab...
Arun A. Nair, Stijn Eyerman, Lieven Eeckhout, Lizy...