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» Leakage Current Reduction in VLSI Systems
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DFT
2004
IEEE
90views VLSI» more  DFT 2004»
13 years 11 months ago
An XOR Based Reed-Solomon Algorithm for Advanced RAID Systems
In this paper, a simple codec algorithm based on Reed-Solomon (RS) codes is proposed for erasure correcting in RAID (Redundant Array of Independent Disks) level 6 systems. Unlike ...
Ping-Hsun Hsieh, Ing-Yi Chen, Yu-Ting Lin, Sy-Yen ...
GLVLSI
2003
IEEE
157views VLSI» more  GLVLSI 2003»
14 years 27 days ago
Optimum wire sizing of RLC interconnect with repeaters
Repeaters are often used to drive high impedance interconnects. These lines have become highly inductive and can affect signal behavior. The line inductance should therefore be co...
Magdy A. El-Moursy, Eby G. Friedman
DAC
2006
ACM
14 years 8 months ago
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sh...
VLSID
2003
IEEE
110views VLSI» more  VLSID 2003»
14 years 8 months ago
A New Reactive Processor with Architectural Support for Control Dominated Embedded Systems
Control dominated embedded systems have to be designed for fast reaction to asynchronous external events occurring in the environment. Such systems must be able to perform signal ...
Partha S. Roop, Zoran A. Salcic, Morteza Biglari-A...
FCCM
1999
IEEE
210views VLSI» more  FCCM 1999»
13 years 12 months ago
Algorithm Analysis and Mapping Environment for Adaptive Computing Systems: Further Results
Abstract We are developing an integrated algorithm analysis and mapping environment particularly tailored for signal processing applications on Adaptive Computing Systems ACS. Our ...
Eric K. Pauer, Paul D. Fiore, John M. Smith