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SLIP
2009
ACM
14 years 2 months ago
Floorplan-based FPGA interconnect power estimation in DSP circuits
A novel high-level approach for estimating power consumption of global interconnects in data-path oriented designs implemented in FPGAs is presented. The methodology is applied to...
Ruzica Jevtic, Carlos Carreras, Vukasin Pejovic
ASPDAC
2008
ACM
101views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Interconnect modeling for improved system-level design optimization
Accurate modeling of delay, power, and area of interconnections early in the design phase is crucial for effective system-level optimization. Models presently used in system-level...
Luca P. Carloni, Andrew B. Kahng, Swamy Muddu, Ale...
ASPDAC
2009
ACM
142views Hardware» more  ASPDAC 2009»
14 years 2 months ago
On the futility of statistical power optimization
In response to the increasing variations in integrated-circuit manufacturing, the current trend is to create designs that take these variations into account statistically. In this...
Jason Cong, Puneet Gupta, John Lee
ICPP
1999
IEEE
14 years 8 days ago
The Index-Permutation Graph Model for Hierarchical Interconnection Networks
In this paper, we present the index-permutation (IP) graph model, and apply it to the systematic development of efficient hierarchical networks. We derive several classes of inter...
Chi-Hsiang Yeh, Behrooz Parhami