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ISLPED
2010
ACM
206views Hardware» more  ISLPED 2010»
13 years 8 months ago
Energy efficient implementation of parallel CMOS multipliers with improved compressors
Booth encoding is believed to yield faster multiplier designs with higher energy consumption. 16x16-bit Booth and NonBooth multipliers are analyzed in energy and delay space under...
Dursun Baran, Mustafa Aktan, Vojin G. Oklobdzija
COLT
2008
Springer
13 years 10 months ago
Learning Acyclic Probabilistic Circuits Using Test Paths
We define a model of learning probabilistic acyclic circuits using value injection queries, in which an arbitrary subset of wires is set to fixed values, and the value on the sing...
Dana Angluin, James Aspnes, Jiang Chen, David Eise...
APPROX
2010
Springer
148views Algorithms» more  APPROX 2010»
13 years 10 months ago
Learning and Lower Bounds for AC0 with Threshold Gates
In 2002 Jackson et al. [JKS02] asked whether AC0 circuits augmented with a threshold gate at the output can be efficiently learned from uniform random examples. We answer this ques...
Parikshit Gopalan, Rocco A. Servedio
ICCAD
1995
IEEE
88views Hardware» more  ICCAD 1995»
14 years 6 days ago
LOT: logic optimization with testability-new transformations using recursive learning
: A new approach to optimize multi-level logic circuits is introduced. Given a multi-level circuit, the synthesis method optimizes its area, simultaneously enhancing its random pat...
Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang K...
COLT
2006
Springer
14 years 11 days ago
Efficient Learning Algorithms Yield Circuit Lower Bounds
We describe a new approach for understanding the difficulty of designing efficient learning algorithms. We prove that the existence of an efficient learning algorithm for a circui...
Lance Fortnow, Adam R. Klivans