373 search results - page 34 / 75 » Learning Arithmetic Circuits |
IJCNN
2000
IEEE
14 years 1 months ago
2000
IEEE
We have fabricated a PCA (Principal Component Analysis) learning network in a FPGA (Field Programmable Gate Array) by using an asynchronous PDM (Pulse Density Modulation) digital ...
ICONIP
2008
13 years 10 months ago
2008
Abstract. We previously proposed a neural segmentation model suitable for implementation with complementary metal-oxide-semiconductor (CMOS) circuits. The model consists of neural ...
ICONIP
2007
13 years 10 months ago
2007
We proposed a neural segmentation model that is suitable for implementation in analog VLSIs using conventional CMOS technology. The model consists of neural oscillators mutually co...
DATE
2010
IEEE
14 years 1 months ago
2010
IEEE
— We discuss a fault diagnosis scheme for analog integrated circuits. Our approach is based on an assemblage of learning machines that are trained beforehand to guide us through ...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
— Boolean Satistifiability has attracted tremendous research effort in recent years, resulting in the developments of various efficient SAT solver packages. Based upon their de...