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» Learning Arithmetic Circuits
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CSR
2009
Springer
14 years 3 months ago
Simulation of Arithmetical Circuits by Branching Programs with Preservation of Constant Width and Syntactic Multilinearity
Abstract. We study structural properties of restricted width arithmetical circuits. It is shown that syntactically multilinear arithmetical circuits of constant width can be effici...
Maurice J. Jansen, B. V. Raghavendra Rao
FOCS
2007
IEEE
14 years 2 months ago
A Lower Bound for the Size of Syntactically Multilinear Arithmetic Circuits
We construct an explicit polynomial f(x1, . . . , xn), with coefficients in {0, 1}, such that the size of any syntactically multilinear arithmetic circuit computing f is at least ...
Ran Raz, Amir Shpilka, Amir Yehudayoff
ICCAD
2009
IEEE
119views Hardware» more  ICCAD 2009»
13 years 6 months ago
Iterative layering: Optimizing arithmetic circuits by structuring the information flow
Current logic synthesis techniques are ineffective for arithmetic circuits. They perform poorly for XOR-dominated circuits, and those with a high fan-in dependency between inputs ...
Ajay K. Verma, Philip Brisk, Paolo Ienne
VLSID
2002
IEEE
79views VLSI» more  VLSID 2002»
14 years 9 months ago
A Power Minimization Technique for Arithmetic Circuits by Cell Selection
As a basic cell of arithmetic circuits, a one-bit full adder and a counter are usually used. Minimizing power consumption of these components is a key issue for low-power circuit ...
Masanori Muroyama, Tohru Ishihara, Akihiko Hyodo, ...
DAC
2007
ACM
14 years 9 months ago
Enhancing FPGA Performance for Arithmetic Circuits
FPGAs offer flexibility and cost-effectiveness that ASICs cannot match; however, their performance is quite poor in comparison, especially for arithmetic dominated circuits. To ad...
Philip Brisk, Ajay K. Verma, Paolo Ienne, Hadi Par...