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» Learning to Generate Fast Signal Processing Implementations
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FPL
2010
Springer
170views Hardware» more  FPL 2010»
13 years 5 months ago
IP Based Configurable SIMD Massively Parallel SoC
Significant advances in the field of configurable computing have enabled parallel processing within a single FieldProgrammable Gate Array (FPGA) chip. This paper presents the imple...
Mouna Baklouti, Mohamed Abid, Philippe Marquet, Je...
DATE
2000
IEEE
94views Hardware» more  DATE 2000»
13 years 12 months ago
Shared Memory Implementations of Synchronous Dataflow Specifications
There has been a proliferation of block-diagram environments for specifying and prototyping DSP systems. These include tools from academia like Ptolemy [3], and GRAPE [7], and com...
Praveen K. Murthy, Shuvra S. Bhattacharyya
ICMCS
2006
IEEE
117views Multimedia» more  ICMCS 2006»
14 years 1 months ago
Data Hiding for Speech Bandwidth Extension and its Hardware Implementation
Most of the current speech transmission systems are only able to deliver speech signals in a narrow frequency band. This narrowband speech is characterized by a thin and muffled ...
Fan Wu, Siyue Chen, Henry Leung
VLSISP
2011
358views Database» more  VLSISP 2011»
13 years 2 months ago
Accelerating Machine-Learning Algorithms on FPGAs using Pattern-Based Decomposition
Machine-learning algorithms are employed in a wide variety of applications to extract useful information from data sets, and many are known to suffer from superlinear increases in ...
Karthik Nagarajan, Brian Holland, Alan D. George, ...
HICSS
2000
IEEE
110views Biometrics» more  HICSS 2000»
13 years 12 months ago
Reverse Compilation for Digital Signal Processors: A Working Example
We describe the implementation and use of a reverse compiler from Analog Devices 21xx assembler source to ANSI-C with optional use of the language extensions for the TMS320C6x pr...
Adrian Johnstone, Elizabeth Scott, Tim Womack