The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...
In this paper, we propose, implement and analyze the performance of a Reconfigurable Sequential Consistency Algorithm (RSCA) using simulation. Extending the concepts of reconfigur...
Motion estimation is a complex computation found in video compression algorithms, such as standards like MPEG-4 and H.263. This paper proposes an embedded reconfigurable array for...
In this paper, we present a method to estimate the number of reconfiguration steps that a time-constrained algorithm can accommodate. This analysis demonstrates how one would attac...
Network Processors (NPs) are set to play a key role in the next generation of networking technology. They have the performance of ASIC-based routers whilst offering a high degree o...