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ISPASS
2006
IEEE
14 years 4 months ago
Branch trace compression for snapshot-based simulation
We present a scheme to compress branch trace information for use in snapshot-based microarchitecture simulation. The compressed trace can be used to warm any arbitrary branch pred...
Kenneth C. Barr, Krste Asanovic
NOCS
2009
IEEE
14 years 4 months ago
Silicon-photonic clos networks for global on-chip communication
Future manycore processors will require energyefficient, high-throughput on-chip networks. Siliconphotonics is a promising new interconnect technology which offers lower power, h...
Ajay Joshi, Christopher Batten, Yong-Jin Kwon, Sco...
EUROPAR
2003
Springer
14 years 3 months ago
Exploiting On-Chip Data Transfers for Improving Performance of Chip-Scale Multiprocessors
As compared to a complex single processor based system, on-chip multiprocessors are less complex, more power efficient, and easier to test and validate. In this work, we focus on a...
Guangyu Chen, Mahmut T. Kandemir, Alok N. Choudhar...
INFOCOM
2008
IEEE
14 years 4 months ago
Reducing Maximum Stretch in Compact Routing
—It is important in communication networks to use routes that are as short as possible (i.e have low stretch) while keeping routing tables small. Recent advances in compact routi...
Mihaela Enachescu, Mei Wang, Ashish Goel
COOPIS
2004
IEEE
14 years 1 months ago
Making Workflow Models Sound Using Petri Net Controller Synthesis
More and more companies use "process aware" information systems to make their business processes more efficient. To do this, workflow definitions must be formulated in a ...
Juliane Dehnert, Armin Zimmermann