102 search results - page 7 / 21 » Leveraging High Performance Data Cache Techniques to Save Po... |
ISCA
2009
IEEE
14 years 2 months ago
2009
IEEE
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
INFOCOM
1999
IEEE
13 years 11 months ago
1999
IEEE
The distributed embedded systems industry is poised to leverage emerging real-time operating systems, such as Inferno, Windows CE 2.0, and Palm OS, to support mobile communication...
ICCAD
2008
IEEE
14 years 4 months ago
2008
IEEE
— Leveraging the power of scratchpad memories (SPMs) available in most embedded systems today is crucial to extract maximum performance from application programs. While regular a...
DATE
2003
IEEE
14 years 19 days ago
2003
IEEE
This paper presents a new algorithm for on-the-fly data compression in high performance VLIW processors. The algorithm aggressively targets energy minimization of some of the domi...
RTAS
2010
IEEE
13 years 5 months ago
2010
IEEE
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...