460 search results - page 80 / 92 » Limits of Control Flow on Parallelism |
ICDCS
2007
IEEE
14 years 2 months ago
2007
IEEE
While extensive studies have been carried out in the past several years for many sensor applications, they cannot be applied to the network with extremely low and intermittent con...
IEEEPACT
2006
IEEE
14 years 2 months ago
2006
IEEE
Modern out-of-order processors with non-blocking caches exploit Memory-Level Parallelism (MLP) by overlapping cache misses in a wide instruction window. The exploitation of MLP, h...
ISCA
2002
IEEE
13 years 8 months ago
2002
IEEE
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
WWW
2005
ACM
14 years 9 months ago
2005
ACM
The demand for quickly delivering new applications is increasingly becoming a business imperative today. Application development is often done in an ad hoc manner, without standar...
CODES
2004
IEEE
14 years 10 days ago
2004
IEEE
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...