- Chip floorplan in a reticle for Multi-Project Wafer (MPW) plays a key role in deciding chip fabrication cost. In this paper1 , we propose a methodology to explore reticle floopla...
In this paper, we make a survey of Distance Vector Multicast Routing Protocol (DVMRP)andfind that it is not optimal in the aspect of network cost (NC). Therefore, we propose a mod...
In this paper, we propose a Genetic Algorithm (GA) approach using a new paths growth procedure by the random key-based encoding for solving Shortest Path Routing (SPR) problem. An...
In this paper, a two-stage block hypothesis testing following the idea of Fan, Lin and Cheng (2004) is proposed for massive data regression analysis. Variables selection criteria ...
We propose a new variable-sized-block method for VLIW code compression. Code compression traditionally works on fixed-sized blocks and its efficiency is limited by the small block...