3995 search results - page 692 / 799 » Linearization of hybrid processes |
147
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HIPC
2004
Springer
15 years 9 months ago
2004
Springer
Parasitic extraction techniques are used to estimate signal delay in VLSI chips. Inductance extraction is a critical component of the parasitic extraction process in which on-chip ...
134
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ICA
2004
Springer
15 years 9 months ago
2004
Springer
We discuss a 3D spatial analysis of fMRI data taken during a combined word perception and motor task. The event - based experiment was part of a study to investigate the network of...
131
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SAT
2004
Springer
15 years 9 months ago
2004
Springer
Linear Pseudo-Boolean constraints offer a much more compact formalism to express significant boolean problems in several areas, ranging from Artificial Intelligence to Electroni...
131
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DATE
2003
IEEE
15 years 9 months ago
2003
IEEE
The growing impact of within-die process variation has created the need for statistical timing analysis, where gate delays are modeled as random variables. Statistical timing anal...
128
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DATE
2003
IEEE
15 years 9 months ago
2003
IEEE
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...