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» Load Balancing with Memory
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136
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CF
2009
ACM
15 years 9 months ago
Mapping the LU decomposition on a many-core architecture: challenges and solutions
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...
Ioannis E. Venetis, Guang R. Gao
120
Voted
ASPLOS
2010
ACM
15 years 9 months ago
COMPASS: a programmable data prefetcher using idle GPU shaders
A traditional fixed-function graphics accelerator has evolved into a programmable general-purpose graphics processing unit over the last few years. These powerful computing cores...
Dong Hyuk Woo, Hsien-Hsin S. Lee
134
Voted
EIT
2008
IEEE
15 years 9 months ago
Architectural support for securing application data in embedded systems
—The rapid growth and pervasive use of embedded systems makes it easier for an adversary to gain physical access to these devices to launch attacks and reverse engineer of the sy...
Olga Gelbart, Eugen Leontie, Bhagirath Narahari, R...
ASPLOS
2004
ACM
15 years 8 months ago
Software prefetching for mark-sweep garbage collection: hardware analysis and software redesign
Tracing garbage collectors traverse references from live program variables, transitively tracing out the closure of live objects. Memory accesses incurred during tracing are essen...
Chen-Yong Cher, Antony L. Hosking, T. N. Vijaykuma...
135
Voted
KDD
2006
ACM
253views Data Mining» more  KDD 2006»
16 years 2 months ago
Adaptive Website Design Using Caching Algorithms
Visitors enter a website through a variety of means, including web searches, links from other sites, and personal bookmarks. In some cases the first page loaded satisfies the visi...
Justin Brickell, Inderjit S. Dhillon, Dharmendra S...