1929 search results - page 326 / 386 » Load Balancing with Memory |
108
click to vote
ACL
2010
15 years 15 days ago
2010
We propose a translation recommendation framework to integrate Statistical Machine Translation (SMT) output with Translation Memory (TM) systems. The framework recommends SMT outp...
142
Voted
GLOBECOM
2010
IEEE
15 years 14 days ago
2010
IEEE
When asymmetric cryptography techniques are used in wireless networks, the public keys of the nodes need to be widely available and signed by a Certificate Authority (CA). However,...
138
click to vote
ICCAD
2010
IEEE
15 years 13 days ago
2010
IEEE
3D stacked circuits reduce communication delay in multicore system-on-chips (SoCs) and enable heterogeneous integration of cores, memories, sensors, and RF devices. However, vertic...
136
click to vote
DAC
2011
ACM
14 years 2 months ago
2011
ACM
Using device write buffers is a promising technique to improve the write performance of solid-state disks. The write buffer not only reduces the write traffic to the flash but als...
125
click to vote
INFOCOM
2009
IEEE
15 years 9 months ago
2009
IEEE
Currently, the increasing rate of routing lookups in Internet routers, the large number of prefixes and also the transition from IPV4 to IPV6, have caused Internet designers to pro...