141 search results - page 13 / 29 » Load Execution Latency Reduction |
MASCOTS
2004
13 years 8 months ago
2004
File prefetching based on previous file access patterns has been shown to be an effective means of reducing file system latency by implicitly loading caches with files that are li...
ASPLOS
2011
ACM
12 years 11 months ago
2011
ACM
We present PowerDial, a system for dynamically adapting application behavior to execute successfully in the face of load and power fluctuations. PowerDial transforms static conï¬...
ISCA
2005
IEEE
14 years 1 months ago
2005
IEEE
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...
MICRO
1997
IEEE
13 years 11 months ago
1997
IEEE
As processors continue to exploit more instruction level parallelism, a greater demand is placed on reducing the e ects of memory access latency. In this paper, we introduce a nov...
ISCA
2002
IEEE
14 years 12 days ago
2002
IEEE
Instruction window size is an important design parameter for many modern processors. Large instruction windows offer the potential advantage of exposing large amounts of instructi...