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» Load Redundancy Elimination on Executable Code
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CGO
2005
IEEE
14 years 1 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
PLDI
1990
ACM
13 years 11 months ago
A Fresh Look at Optimizing Array Bound Checking
- This paper describes techniques for optimizing range checks performed to detect array bound violations. In addition to the elimination of range check:s, the optimizations discuss...
Rajiv Gupta
ISCA
2005
IEEE
118views Hardware» more  ISCA 2005»
14 years 28 days ago
Continuous Optimization
This paper presents a hardware-based dynamic optimizer that continuously optimizes an application’s instruction stream. In continuous optimization, dataflow optimizations are p...
Brian Fahs, Todd M. Rafacz, Sanjay J. Patel, Steve...
EUROSYS
2007
ACM
14 years 4 months ago
Sealing OS processes to improve dependability and safety
In most modern operating systems, a process is a -protected abstraction for isolating code and data. This protection, however, is selective. Many common mechanisms—dynamic code ...
Galen C. Hunt, Mark Aiken, Manuel Fähndrich, ...
ICFP
1997
ACM
13 years 11 months ago
Implementing Bit-addressing with Specialization
General media-processing programs are easily expressed with bitaddressing and variable-sized bit-fields. But the natural implementation of bit-addressing relies on dynamic shift ...
Scott Draves