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IPPS
2006
IEEE
14 years 2 months ago
Architecture of a multi-context FPGA using a hybrid multiple-valued/binary context switching signal
Multi-context FPGAs have multiple memory bits per configuration bit forming configuration planes for fast switching between contexts. Large amount of memory causes significant ove...
Yoshihiro Nakatani, Masanori Hariyama, Michitaka K...
IPPS
1996
IEEE
14 years 22 days ago
Parallel Algorithms for Image Enhancement and Segmentation by Region Growing with an Experimental Study
This paper presents e cient and portable implementations of a useful image enhancement process, the Symmetric Neighborhood Filter SNF, and an image segmentation technique which ma...
David A. Bader, Joseph JáJá, David H...
HPCA
1996
IEEE
14 years 22 days ago
Improving Release-Consistent Shared Virtual Memory Using Automatic Update
Shared virtual memory is a software technique to provide shared memory on a network of computers without special hardware support. Although several relaxed consistency models and ...
Liviu Iftode, Cezary Dubnicki, Edward W. Felten, K...
HPCA
2003
IEEE
14 years 9 months ago
Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors
Thread-level speculation provides architectural support to aggressively run hard-to-analyze code in parallel. As speculative tasks run concurrently, they generate unsafe or specul...
María Jesús Garzarán, Milos P...
DCOSS
2006
Springer
14 years 7 days ago
Contour Approximation in Sensor Networks
Abstract. We propose a distributed scheme called Adaptive-GroupMerge for sensor networks that, given a parameter k, approximates a geometric shape by a k-vertex polygon. The algori...
Chiranjeeb Buragohain, Sorabh Gandhi, John Hershbe...