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ATS
2009
IEEE
142views Hardware» more  ATS 2009»
14 years 2 months ago
Speeding up SAT-Based ATPG Using Dynamic Clause Activation
Abstract—SAT-based ATPG turned out to be a robust alternative to classical structural ATPG algorithms such as FAN. The number of unclassified faults can be significantly reduce...
Stephan Eggersglüß, Daniel Tille, Rolf ...
CEC
2010
IEEE
13 years 7 months ago
Parallel hybrid evolutionary algorithms on GPU
Abstract— Over the last years, interest in hybrid metaheuristics has risen considerably in the field of optimization. Combinations of methods such as evolutionary algorithms and...
Thé Van Luong, Nouredine Melab, El-Ghazali ...
SC
2005
ACM
14 years 29 days ago
Integrated Loop Optimizations for Data Locality Enhancement of Tensor Contraction Expressions
A very challenging issue for optimizing compilers is the phase ordering problem: In what order should a collection of compiler optimizations be performed? We address this problem ...
Swarup Kumar Sahoo, Sriram Krishnamoorthy, Rajkira...
DAC
2004
ACM
14 years 8 months ago
Exploiting structure in symmetry detection for CNF
Instances of the Boolean satisfiability problem (SAT) arise in many areas of circuit design and verification. These instances are typically constructed from some human-designed ar...
Paul T. Darga, Mark H. Liffiton, Karem A. Sakallah...
ICCD
2001
IEEE
103views Hardware» more  ICCD 2001»
14 years 4 months ago
Fixed-outline Floorplanning through Better Local Search
Classical floorplanning minimizes a linear combination of area and wirelength. When Simulated Annealing is used, e.g., with the Sequence Pair representation, the typical choice o...
Saurabh N. Adya, Igor L. Markov