Fusion of sensor and communication data currently can only be performed at a late processing stage after sensor and information are formulated as logical statements at appropriate...
This paper proposes a coprocessor architecture to speed up hardware evolution. It is designed to be implemented in an FPGA with an integrated microprocessor core. The coprocessor r...
Tillmann Schmitz, Steffen G. Hohmann, Karlheinz Me...
Abstract. The alignment of different ontologies requires the specification, representation and execution of translation rules. The rules need to integrate translations at the lexic...
Fernando Silva Parreiras, Steffen Staab, Simon Sch...
Abstract. Data integration, in the context of the web, faces new problems, due in particular to the heterogeneity of sources, to the fragmentation of the information and to the abs...
Sonia Bergamaschi, Pablo R. Fillottrani, Gionata G...
Multistage residual vector quantizers (RVQ) with optimal direct sum decoder codebooks have been successfully designed and implemented for data compression. Due to its multistage s...