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» Logical Structures in the Lexicon
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ISCA
2008
IEEE
132views Hardware» more  ISCA 2008»
14 years 2 months ago
Online Estimation of Architectural Vulnerability Factor for Soft Errors
As CMOS technology scales and more transistors are packed on to the same chip, soft error reliability has become an increasingly important design issue for processors. Prior resea...
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. ...
CASES
2006
ACM
14 years 2 months ago
Extensible control architectures
Architectural advances of modern systems has often been at odds with control complexity, requiring significant effort in both design and verification. This is particularly true ...
Greg Hoover, Forrest Brewer, Timothy Sherwood
ISPD
2004
ACM
146views Hardware» more  ISPD 2004»
14 years 1 months ago
Power-aware clock tree planning
Modern processors and SoCs require the adoption of poweroriented design styles, due to the implications that power consumption may have on reliability, cost and manufacturability ...
Monica Donno, Enrico Macii, Luca Mazzoni
ASPDAC
2005
ACM
93views Hardware» more  ASPDAC 2005»
13 years 10 months ago
Power minimization for dynamic PLAs
—Dynamic programmable logic arrays (PLAs) which are built of the NOR–NOR structure, have been very popular in high performance design because of their high-speed and predictabl...
Tzyy-Kuen Tien, Chih-Shen Tsai, Shih-Chieh Chang, ...
NDJFL
2000
97views more  NDJFL 2000»
13 years 7 months ago
Neo-Fregean Foundations for Real Analysis: Some Reflections on Frege's Constraint
now of a number of ways of developing Real Analysis on a basis of abstraction principles and second-order logic. One, outlined by Shapiro in his contribution to this volume, mimic...
Crispin Wright