2225 search results - page 433 / 445 » Logical Structures in the Lexicon |
DFG
2004
Springer
13 years 11 months ago
2004
Springer
This paper presents the real-time model checker RAVEN and related theoretical background. RAVEN augments the efficiency of traditional symbolic model checking with possibilities to...
CF
2006
ACM
13 years 11 months ago
2006
ACM
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
FCCM
2004
IEEE
13 years 11 months ago
2004
IEEE
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
ASPDAC
1995
ACM
13 years 11 months ago
1995
ACM
- In this paper, we present a new scheduling algorithms that generates area-efficient register transfer level datapaths with multiport memories. The proposed scheduling algorithm a...
ISPW
1991
IEEE
13 years 11 months ago
1991
IEEE
product and the project as well as to define synchronization (or interaction) abstractions; activity definitions are used to model the process activities that transform the produ...