980 search results - page 20 / 196 » Logical Testing |
DLOG
2008
13 years 9 months ago
2008
Abstract. We show that subsumption problems in EL and related description logics can be expressed as uniform word problems in classes of semilattices with monotone operators. We us...
ITC
2003
IEEE
14 years 24 days ago
2003
IEEE
An in-circuit diagnostic test structure triggered by a light pulse captures logic states on-chip with picosecond timing accuracy, and the results read out via a scan chain thus pr...
ATS
2005
IEEE
14 years 1 months ago
2005
IEEE
— Structural transformation of a design to enhance its testability while satisfying design constraints on power and performance, can result in improved test cost and test confid...
DFT
2006
IEEE
14 years 1 months ago
2006
IEEE
1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...
ITC
2000
IEEE
13 years 12 months ago
2000
IEEE
We present the application of a deterministic logic BIST scheme on state-of-the-art industrial circuits. Experimental results show that complete fault coverage can be achieved for...