This paper addresses the problem of automatic generation of implementation software from high-level functional specifications in the context of embedded system on chip designs. So...
In this paper we show how coalition logic can be reduced to the fusion of a normal modal STIT logic for agency and a standard normal temporal logic for discrete time, and how this...
Abstract. We investigate cut-elimination and cut-simulation in impredicative (higher-order) logics. We illustrate that adding simple axioms such as Leibniz equations to a calculus ...
This paper presents a method of using genetic programming to seek new cellular automata that perform computational tasks. Two genetic algorithms are used : the first one discovers ...
Real defects (e.g. stuck-at or bridging faults) in the VLSI circuits cause intermediate voltages and can not be modeled as ideal shorts. In this paper we first show that the trad...