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» Logics for Contravariant Simulations
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ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
14 years 3 months ago
Minimization of the expected path length in BDDs based on local changes
— In many verification tools methods for functional simulation based on reduced ordered Binary Decision Diagrams (BDDs) are used. The evaluation time for a BDD can be crucial an...
Rüdiger Ebendt, Wolfgang Günther, Rolf D...
CAV
2004
Springer
202views Hardware» more  CAV 2004»
14 years 3 months ago
Statistical Model Checking of Black-Box Probabilistic Systems
Abstract. We propose a new statistical approach to analyzing stochastic systems against specifications given in a sublogic of continuous stochastic logic (CSL). Unlike past numeri...
Koushik Sen, Mahesh Viswanathan, Gul Agha
FPGA
2004
ACM
180views FPGA» more  FPGA 2004»
14 years 3 months ago
A VHDL MPEG-7 shape descriptor extractor
Unlike its predecessors, MPEG-7 standardizes multimedia metadata description. By providing robust descriptors and an effective system for storing them, MPEG-7 is designed to provi...
Bret Woz, Andreas E. Savakis
ISCIS
2004
Springer
14 years 3 months ago
Semi-formal and Formal Models Applied to Flexible Manufacturing Systems
Abstract. Flexible Manufacturing Systems (FMSs) are adopted to process different goods in different mix ratios allowing firms to react quickly and efficiently to changes in produ...
Andrea Matta, Carlo A. Furia, Matteo Rossi
PATMOS
2004
Springer
14 years 3 months ago
Sleepy Stack Reduction of Leakage Power
Leakage power consumption of current CMOS technology is already a great challenge. ITRS projects that leakage power consumption may come to dominate total chip power consumption as...
Jun-Cheol Park, Vincent John Mooney III, Philipp P...