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FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
15 years 10 months ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus
FUZZY
1997
Springer
166views Fuzzy Logic» more  FUZZY 1997»
15 years 10 months ago
Optimizing Video Signal Processing Algorithms by Evolution Strategies
Today many kinds of postprocessing are used in digital TV receivers or multimedia terminals for video signals to enhance the picture quality. To achieve this the properties of hum...
H. Blume, O. Franzen, M. Schmidt
ACSC
2004
IEEE
15 years 9 months ago
On Evolving Fixed Pattern Strategies for Iterated Prisoner's Dilemma
Table 1 shows the payoff to player one. The same matrix also holds for player two. Player one can gain the maximum 5 points (T = 5) by defection if player two cooperates. However,...
Daniel Jang, Peter A. Whigham, Grant Dick
ISF
2008
114views more  ISF 2008»
15 years 5 months ago
An OVAL-based active vulnerability assessment system for enterprise computer networks
Abstract Many security problems are caused by vulnerabilities hidden in enterprise computer networks. It is very important for system administrators to have knowledge about the sec...
Xiuzhen Chen, Qinghua Zheng, Xiaohong Guan
ISCA
2008
IEEE
132views Hardware» more  ISCA 2008»
16 years 8 days ago
Online Estimation of Architectural Vulnerability Factor for Soft Errors
As CMOS technology scales and more transistors are packed on to the same chip, soft error reliability has become an increasingly important design issue for processors. Prior resea...
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. ...