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» Logics for Contravariant Simulations
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DAC
2004
ACM
15 years 9 months ago
Communication-efficient hardware acceleration for fast functional simulation
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong...
PADS
2006
ACM
15 years 11 months ago
Aurora: An Approach to High Throughput Parallel Simulation
A master/worker paradigm for executing large-scale parallel discrete event simulation programs over networkenabled computational resources is proposed and evaluated. In contrast t...
Alfred Park, Richard M. Fujimoto
PADS
2005
ACM
15 years 11 months ago
Merging Parallel Simulation Programs
In earlier work cloning is proposed as a means for efficiently splitting a running simulation midway through its execution into multiple parallel simulations. In simulation cloni...
Abhishek Agarwal, Maria Hybinette
PADS
2003
ACM
15 years 11 months ago
DVS: An Object-Oriented Framework for Distributed Verilog Simulation
There is a wide-spread usage of hardware design languages(HDL) to speed up the time-to-market for the design of modern digital systems. Verification engineers can simulate hardwa...
Lijun Li, Hai Huang, Carl Tropper
163
Voted
CAISE
2008
Springer
15 years 7 months ago
An Hybrid Design Solution For Spacecraft Simulators
Abstract. The European Space Agency (ESA) has created the Simulation Model Portability 2 (SMP2) standard with the purpose to provide a design solution for the project of Spacecraft...
Vitor Rodrigues, João Correia Lopes, Ana Mo...