1010 search results - page 49 / 202 » Logics for Contravariant Simulations |
DAC
2004
ACM
13 years 11 months ago
2004
ACM
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
PADS
2006
ACM
14 years 2 months ago
2006
ACM
A master/worker paradigm for executing large-scale parallel discrete event simulation programs over networkenabled computational resources is proposed and evaluated. In contrast t...
PADS
2005
ACM
14 years 1 months ago
2005
ACM
In earlier work cloning is proposed as a means for efficiently splitting a running simulation midway through its execution into multiple parallel simulations. In simulation cloni...
PADS
2003
ACM
14 years 1 months ago
2003
ACM
There is a wide-spread usage of hardware design languages(HDL) to speed up the time-to-market for the design of modern digital systems. Verification engineers can simulate hardwa...
CAISE
2008
Springer
13 years 10 months ago
2008
Springer
Abstract. The European Space Agency (ESA) has created the Simulation Model Portability 2 (SMP2) standard with the purpose to provide a design solution for the project of Spacecraft...