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CSREAESA
2006
13 years 9 months ago
Delay-Reduced Combinational Logic Synthesis using Multiplexers
- This paper presents an approach to obtain reduced hardware and/or delay for synthesizing logic functions using multiplexers. Replication of single control line multiplexer is use...
Rekha K. James, T. K. Shahana, K. Poulose Jacob, S...
AMAI
2004
Springer
13 years 8 months ago
Rapid Prototyping of Large Multi-Agent Systems Through Logic Programming
Prototyping is a valuable technique to help software engineers explore the design space while gaining insight on the dynamics of the system. In this paper, we describe a method for...
Wamberto Weber Vasconcelos, David Stuart Robertson...
AML
2000
82views more  AML 2000»
13 years 8 months ago
Mixed logic and storage operators
In 1990 J-L. Krivine introduced the notion of storage operators. They are -terms which simulate call-by-value in the call-by-name strategy and they can be used in order to modeliz...
Karim Nour
ATS
2005
IEEE
139views Hardware» more  ATS 2005»
14 years 1 months ago
Shannon Expansion Based Supply-Gated Logic for Improved Power and Testability
— Structural transformation of a design to enhance its testability while satisfying design constraints on power and performance, can result in improved test cost and test confid...
Swaroop Ghosh, Swarup Bhunia, Kaushik Roy
ITC
2003
IEEE
127views Hardware» more  ITC 2003»
14 years 1 months ago
Using Logic Models To Predict The Detection Behavior Of Statistical Timing Defects
In this paper, we study the possibility of using logic defect-level prediction models to predict the detection behavior of statistical timing defects. We compare two known logic m...
Li-C. Wang, Angela Krstic, Leonard Lee, Kwang-Ting...